1/ What is latch up?
n)." 28)how="" convert="" sr="" jk="" feed="" convert,="" i.e="" !q=">S" q=">R.Hence" s="" j="" k="" 29)how="" 30)what="" race-around="" problem?how="" rectify="" remains="" complement="" repeat="" complementing="" 0,="" race="" around="" problem.to="" undesirable="" operation,="" duration="" shorter="" propagation="" f-f,="" restrictive="" master-slave="" edge-triggered="" construction.="" 31)how="" detect="" 8-bit="" same?="" e.g.="" a[0]="" b[0]="" )="" on.the="" 8="" 8-i="" 32)7="" ring="" counter's="" initial="" 0100010.="" cycles="" return="" state?="" 6="" 33)="" d-ff="" latch)="" max="" handle,="" information?="" t_setup="6nS" t_hold="2nS" t_propagation="10nS" circuit:="" qbar="" clk="" dff="" q.="" gives="" freq="" max.="" operation:="" (propagation="" delay+setup="" 62.5="" mhz="" 34)guys="" asked="" frequently.="" gates(not,and,or,nand,nor,xor,xnor)="" mux,="" (2="" line)="" line="" i0="" i1="" 0.="" p.="" i1.="" (c)="" i0.="" |="" (d)="" +="" implementations="" (e)="" (f)="" ~b="" obtained="" (g)="" xnor="" 35)n="" n="" (a0,a1,a2......)="" way:="" a0="" a1="" a2="" on.....="" nth="" final="" work?="" detail?="" even="" parity="" detector,="" 1's="" input...this="" odd="" generator="" total="" odd.="" just="" opposite,="" detector="" generator.="" 36)an="" assembly="" fail="" safe="" sensors="" emergency="" shutdown="" switch.the="" moving="" conditions="" arise:="" (i)="" switch="" pressed="" (ii)="" senor1="" sensor2="" activated="" (iii)="" sensor="" sensor3="" (iv)="" above="" required?="" 2-input="" implementation.="" 37)design="" calculates="" number?="" multiplier="" circuits.="" multiplexers="" logic?="" interesting....="" 1^2="0+1=1" 2^2="1+3=4" 3^2="4+5=9" 4^2="9+7=16" 5^2="16+9=25" pattern="" yet?to="" square,="" add="" found.see="" 1,3,5,7="" finally="" 9="" added.wouldn't="" solution="" counter,multiplexer="" couple="" adders?it="" seems="" n.="" full="" subtractor="" adder?="" subtrahend="" one.the="" carry="" adder="" 39)a="" question...="" interviewer="" looking="" specific="" ,="" really="" too..the="" hint="" doesn't="" clock,="" so...?="" edges="" mean="" correct="" violation.="" concerned="" 40)in="" 3-bit="" johnson's="" counter="" unused="" states?="" 2(power="" n)-2n="" johnson="" counter.="" 8-6="2.Unused" 010="" 101="" 41)the="" minimal="" system,="" encrypts="" parallel="" data.="" synchronized="" provided="" system="" well.="" encrypted="" rate="" necessarily="" phase.="" encryption="" centered="" memory="" perform="" lut="" (look-up="" table)="" conversion.="" functionality="" achieved="" prom,="" eprom,="" flash="" etc.="" contains="" code,="" burned="" external="" programmer.="" data_in="" pointer="" combinatorial="" generates="" control="" creates="" read="" access="" memory.="" appropriate="" associate="" represent="" encryption.="" 41)="" lfsr="" .list="" few="" industry="" applications.?="" feedback="" driven="" value.="" industrial="" applications,="" far="" know,="" decryption="" bist(built-in-self-test)="" applications..="" 42)what="" false="" path?how="" ckt?="" paths="" analyzer="" paths,="" exercised="" normal="" operation="" inputs.="" example="" shown="" below.="" mus="" activated,="" sel="" mux.="" sta="" (static="" analysis)="" tools="" able="" identify="" paths;="" sometimes="" report="" paths.="" removal="" makes="" testable="" predictable="" (sometimes="" faster)="" 43)consider="" processors,="" 100ps="" 50ps.="" power?="" 50ps="" power.="" low-skew="" processor="" designed="" tree="" powerful="" overheads="" 44)what="" multi-cycle="" paths?="" registers="" become="" stable.="" ex.="" analyzing="" fig="" below="" sin="" cos="" clock-cycles="" angle="" in.="" block="" unrolled="" cordic)="" periods="" (25mhz)="" propagate="" result.="" capable="" fixing="" problem.="" 45)you="" counters="" counting="" upto="" 16,="" built="" negedge="" "ripple"="" (cascading),="" lesser="" flop="" readily="" available="" whereas="" cascade="" propagating.="" eg:="" flip="" flops="" let="" 10ns="" worst="" ripple="" only.(delay="" flop)="" 46)="" ram="" fifo?="" storage="" synchronization="" i.e.="" peripherals="" working="" domains="" fifo.="" 47)the="" circle="" rotate="" clockwise="" back.="" indicate="" rotating.?="" rotating.="" drawing.="" flip-flop,and="" input.="" rotates="" way="" light="" (second="" sensor)="" equals="" zero,="" "fires"="" becomes="" high.="" diagrams="" circuit.?="" 49)implement="" circuits:="" min="" inpur="" assuming="" a,b,c?="" nand:="" (this="" realizes="" functionality)="" c)="" third="" c="" ((a="" (a="" b))="" thus,="" '3'="" guess="" nor:="" interchange="" xnor:="" 0))="" 50)="" zero?="" strategies="" (h-tree)="" theory="" having="" pll,="" variations="" across="" pure="" h-tree="" practical="" (consumes="" area).="" 51)design="" (finite="" machine)="" 10110?="" 52)convert="" latch)?="" 53)give="" extend="" pulses?the="" waveforms="" figure.="" 54)="" below,="" operation?are="" ff2?="" yes,="" modify="" them?="" minumum="" 8ns="" 125mhz.="" circuit,because="" feedback,="" observe,="" tcq2+and="" thold2,to="" inverters(buffers).="" here="" 1ns.="" exactly="" meets.="" 55)design="" s-r="" 56)how="" master="" slave="" 57)how="" xor's="" inplement="" always="" n-1="" inputs.so="" 15="" 58)design="" finding="" 9's="" compliment="" bcd="" 4-bit="" nothing="" subracting="" 9.so="" subract="" 1001(i.e.="" 9).here="" 2's="" addition.="" 59)="" writeback="" write="" cache?="" caching="" modifications="" cache="" aren't="" copied="" absolutely="" write-back="" microprocessors="" including="" intel="" processors="" 80486.="" microprocessors,="" l1="" contrast,="" write-through="" performs="" operations="" --="" simultaneously.="" yields="" somewhat="" reduces="" improvement="" slight="" risk="" lost="" crashes.="" copy-back="" cache.="" 60)difference="" synchronous,asynchronous="" isynchronous="" communication?="" sending="" sender="" receiver="" enconding="" decoding="" method,="" look="" send="" separate="" clocking="" information.="" own.="" stream="" ones="" zeroes,="" itself="" individual="" stops="" starts.="" sent="" transmitting="" unit.="" negotiate="" data-link="" communication="" begins.="" clocks="" transmission,="" numeric="" errors="" advanced="" things="" error="" correction="" compression.="" time-dependent.="" refers="" processes="" delivered="" certain="" example,="" multimedia="" isochronous="" transport="" fast="" displayed="" audio="" video.="" 61)="" multiply="" divide?="" quotient="" dividend="" greater="" divisor="" subtract="" correct,="" remainder="" stop="" division="" mutliply="" add.="" align="" leftmost="" digits="" portion="" concatentate="" hand="" else="" repeated="" starting="" multiplicand="" correspond="" shifting="" position="" equivalent="" multiplying="" 2,="" decimal="" representation="" 10.="" 2nd="" rightmost="" digit="" lined="" 1st="" 62)what="" soc="" (system="" chip),="" asic,="" "full="" custom="" chip",="" fpga?="" precise="" definitions.="" my="" sense="" all.="" first,="" years="" ago,="" were="" unclear="" vlsi="" meant.="" 50000="" 100000="" lsi?="" professor="" simply="" told="" me="" that;="" complexity="" integration="" demands="" electronic="" automation="" succeed.="" words,="" manually="" drawing="" lots="" little="" blue,="" red="" green="" human="" reasonably="" do.="" that,="" likewise,="" onto="" expertise="" beyond="" traditional="" skills="" electronics.="" hardware,="" software,="" engineering="" talent.="" trivially,="" socs="" aggressively="" combine="" hw="" sw="" chip.="" maybe="" pragmatically,="" asic="" software="" folks="" learning="" other's="" did="" before.="" interpretations="" integrates="" ip="" (intellectual="" property)="" issues="" reuse,="" integrating="" classes="" circuitry="" cmos,="" mixed-signal="" analog="" (e.g.="" sensors,="" modulators,="" ds),="" memory,="" stands="" "application="" integrated="" circuit".="" application.="" usually,="" asics="" methodology.="" typical="" "asic="" flow"="" designers="" description="" languages,="" library="" primitive="" libraries="" containing="" and,="" nand,="" or,="" not,="" adder,="" buffer,="" pad="" wired="" (real="" simple,="" idea..).="" reliance="" automated="" assumption="" essence.="" but,="" manufactured="" scratch="" pre-made="" programmed="" reused.="" may,="" aware="" locations="" pieces="" construction,="" placement="" wiring="" pieces.="" custom,="" contrast="" cell),="" geometric="" feature="" (think="" those="" pretty="" pictures="" seen)="" controlled,="" less,="" certainly="" wire="" manipulate="" (repeat,="" rotate,="" etc.)="" sections="" actively="" engaged="" physical="" features="" circuitry.="" crafting="" nre="" costs,="" lowers="" re="" costs="" memories,="" uarts,="" fpgas,="" field="" programmable="" arrays="" completely="" chips="" programming="" function.="" (almost="" program)="" loaded="" already="" essentially="" interconnects="" meet="" purposes.="" fpgas="" thought="" "sea="" gates"="" specifies="" connected.="" often="" use,="" inherently="" flexible.="" intermixed="" hybrid="" sorts="" microprocessor="" embedded="" manner,="" "soc"="" designer.="" 63)what="" "scan"="" §scan="" insertion="" atpg="" test="" chips)="" manufacture.="" jtag="" boundary="" scan="" is,="" idea="" inside="" instead="" board.="" tests="" defects="" chip's="" whether="" functions="" intended).="" themselves="" occurs="" synthesis.="" (automated="" generation)="" creation="" "test="" vectors"="" enables="" here's="" brief="" summary:="" ˇ="" most)="" design's="" replaced="" special="" "scan="" flip-flops".="" allow="" "chain"="" register)="" mode.="" (perhaps="" chains)="" tool,="" knows="" you've="" created,="" vectors.="" vectors="" "stimulus"="" "expected"="" patterns.="" chains,="" reaction="" stimulus="" again.="" ate="" equipment)="" factory="" mode,="" match,="" defective="" thrown="" away.="" strive="" maximize="" "coverage"="" measure="" nodes="" faulty="" (shorted,="" grounded,="" "stuck="" 1",="" 0"),="" percentage="" detected="" vectors?="" technology="" achive="" coverage="" 90%="" range.="" testing="" solve="" problems.="" memories="" (no="" flip-flops!),="" gate-level="" netlist="" with,="" ate.="" unfamiliar="" manufacturer.="" luxury="" manufacturing="" details="" themselves.="" check="" synopsys="" www="" info.="" verilog="" swap="" temporary="" register?="" temp="" reg="" ;="" @="" (posedge="" clock)="" begin="" reg;="" <="b;" blocking="" non-blocking?(verilog="" commonly="" asked)="" language="" forms="" procedural="" assignment="" statement:="" non-blocking.="" distinguished="" operators.="" statement="" languages.="" passes="" statement.="" non-blocking="" (<="operator)" evaluates="" right-hand="" sides="" assigns="" left-hand="" program="" module="" blocking;="" [0]="" a,="" b;="" begin:="" init1="" #1="" 1;="" $display("blocking:="" );="" $display("non-blocking:="" endmodule="" produces="" output:="" blocking:="" non-blocking:="" assignments="" old="" values="" beginning="" assign="" reflects="" transfers="" systems.="" click="" view="" task="" function?="" function:="" unable="" functions.="" duty="" simulation="" incremented="" routine)="" function,="" event,="" statements="" permitted="" invocation="" least="" argument="" passed.="" inout="" statements.="" tasks:="" tasks="" enabling="" versions="" executed="" non="" contain="" arguments="" type="" output,="" inout.="" facility="" pass="" via="" intra="" define="" b,="" c;="" evaluate="" wait="" units="" regular="" temp_ac="a" #5="" variable.="" 5,="" assigned="" unaffected.="" delta="" time?="" $monitor,$display="" $strobe?="" commands="" syntax,="" display="" text="" screen="" simulation.="" convenient="" waveform="" cwaves?.="" $display="" $strobe="" executed,="" $monitor="" displays="" parameters="" executed.="" format="" string="" c++,="" characters.="" characters="" %d="" (decimal),="" %h="" (hexadecimal),="" %b="" (binary),="" %c="" (character),="" %s="" (string)="" %t="" (time),="" %m="" (hierarchy="" level).="" %5d,="" %5b="" space="" needed.="" append="" h,="" name="" default="" binary,="" octal="" hexadecimal.="" syntax:="" ("format_string",="" par_1,="" par_2,="" ...="" case?="" "full"="" case-expression="" patterns="" matched="" item="" default.="" match="" defined="" items,="" "full."="" "parallel"="" item.="" item,="" matching="" items="" "overlapping"="" "parallel."="" meant="" inferring="" latches,how="" @(s1="" s0="" i2="" i3)="" ({s1,="" s0})="" 2'd0="" 2'd1="" 2'd2="" endcase="" combinations="" specified="" inferred="" ,a="" reproduce="" unknown="" branch="" specified.="" {s1,s0}="3" reproduced="" storing="" inferred.="" observed="" mentioned="" provided.="" executed?="" viewed="" one-step="" process:="" rhs="" (right-hand="" side="" equation)="" update="" lhs="" (left-hand="" expression)="" interruption="" "blocks"="" trailing="" occurring="" completed="" nonblocking="" two-step="" step.="" updated="" first?="" sensitivity="" list?="" indicates="" elements="" change,="" begin?end="" necessary="" mention="" disk?="" yes="" disk="" wise="" pre="" post="" mismatch.="" structure="" follow?="" template="" file="" timescale="" directive="" tells="" simulator="" base="" precision="" `timescale="" ns="" ps="" (input="" outputs);="" parameter="" declarations="" parameter_name="parameter" value;="" in1;="" in2;="" [msb]="" out;="" bus="" declaration="" (only="" statements).="" 2;="" outside="" statements)="" hierarchy="" instantiating="" reference="" instance="" .pin1="" (net1),="" .pin2="" (net2),="" .pinn="" (netn)="" procedures="" combinatinal="" (signal1="" signal2="" signal3)="" logic;="" vhdl?="" compilation="" vhdl.="" design-units="" (entity="" architecture="" pairs),="" reside="" file,="" separately="" compiled="" desired.="" practice="" own="" issue.="" verilog.="" still="" rooted="" native="" interpretative="" speeding="" simulation,="" changed="" original="" language.="" care="" files.="" compilation.="" multitude="" user="" dedicated="" conversion="" another.="" considered="" wisely,="" especially="" enumerated="" (abstract)="" types.="" easier="" write,="" clearer="" unnecessary="" clutter="" code.="" vhdl="" allows="" vhdl,="" geared="" towards="" modeling="" opposed="" abstract="" modeling.="" unlike="" user.="" types,="" wire,="" reg.="" corresponding="" implied="" modeled="" objects,="" signals,="" confused="" register.="" simplicity.="" reusability="" package="" avail="" design-unit="" wishes="" them.="" concept="" packages="" module.="" generally="" accessible="" included="" `include="" compiler="" directive.="" styles="" coding="" gate-level,continuous="" others="" purpose?="" $display,="" $displayb,="" $displayh,="" $displayo,="" $write,="" $writeb,="" $writeh,="" $writeo.="" useful="" $display.this="" displaying="" strings,="" examples="" usage.="" $display("hello="" oni");="" ---="" hello="" oni="" $display($time)="" 460="" $display("="" %b",="" counter);="" 0010="" $reset="" $stop="" halts="" puts="" interactive="" mode="" enter="" commands;="" $finish="" exits="" enhancements="" 2001?="" version="" ,we="" 'or'="" specify="" element="" 2001,="" comma="" 2k="" usage="" (i1,i2,i3,i4)="" 2001="" star="" listing="" combo="" logics="" removes="" typo="" mistakes="" avoids="" mismatches,="" port="" modules="" r,="" wr,="" [7]="" data_in,="" [3]="" addr,="" data_out="" 18)write="" reset?="" (reset)="" independent="" list.="" eg="" @(posedge="" posedge="" reset)="" pli?why="" used?="" interface="" (pli)="" hdl="" programs="" databases="" program.="" pli="" implementing="" calls="" hard="" otherwise="" impossible)="" syntax.="" paradigms="" pli.="" 20)="" triangle="" ants="" corner="" free="" move="" probability="" collide?="" direction,="" let's="" represented="" eight="" possible,="" won't="" collide="" 111="" 000="" collision="" o?="" 21)what="" freeze="" deposit="" force?="" $deposit(variable,="" value);="" sets="" changed;="" net.="" subsequent="" driver="" transaction="" $deposit="" operates="" identically="" modelsim="" force="" -deposit="" command.="" -freeze,="" -drive,="" options.="" none="" specified,="" -freeze="" assumed="" unresolved="" -drive="" resolved="" provide="" compatibility="" 22)will="" infer="" priority="" example?="" r;="" select2)="" (select2)="" 2'b00:="" 2'b01:="" 23)casex,z="" difference,which="" preferable,why?="" casez="" z="" don't-care="" bits.="" casex="" x="" wildcard="" don't="" cares,="" required;="" because:="" cares="" "case"="" therefore="" required.="" automatically="" z's="" x's="" absolute="" match.="" 24)given="" "a"="" displayed?="" @(clk)="" $display(a);="" tricky="" one!="" scheduling="" semantics="" imply="" four-level="" queue="" 1:="" events="" (blocking="" 2:="" inactive="" (#0="" delays,="" etc)="" 3:="" updates="" (non-blocking="" 4:="" monitor="" ($display,="" $monitor,="" etc).="" "a="0"" scheduled="" "queue".="" 3rd="" queue.="" finally,="" 4th="" sim="" cycle,="" happens,="" show="" code?="" five="" action="" calculated="" register,after="" units,="" 26)what="" between:="" (foo)="" merges="" "x",="" foo="1'bx," you'd="" treats="" xs="" zs="" false,="" 27)what="" intertial="" ??="" 28)what="" signify="" 'timescale="" directive.it="" 34)what="" (1)="" x;="" @(...)="" (1'b1)="" x[0]:="" something1;="" x[1]:="" something2;="" x[2]:="" something3;="" x[3]:="" something4;="" walks="" executes="" matches.="" here,="" lowest="" 1-bit="" something3="" logic).="" 35)="" "if="" (2'b01="" 2'b10)..."="" true="" popular="" error.="" operator="" (&)="" (&&).="" 36)what="" simulators="" mainly="" available.="" event-based="" simulator:="" sacrifices="" rich="" functionality:="" .........<="">
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